- #Z220 how to update watchdog timer software
- #Z220 how to update watchdog timer code
- #Z220 how to update watchdog timer Pc
#Z220 how to update watchdog timer code
Life-threatening failure modes mean you've got to beware of simple watchdog timers! If a single I/O instruction successfully keeps the WDT alive, then there's a real chance that the code might crash but continue to tickle the timer. Next, think through the litigation potential of your system. If you rely on the WDT to save the day, driving an interrupt while SP is odd results in a double bus fault, which puts the CPU in a dead state until it's reset. The 68K, for example, will crash if the stack pointer assumes an odd value.
#Z220 how to update watchdog timer software
On other chips a simple software problem can render the non-maskable interrupt unusable. Confused internal logic will shut down NMI response on some CPUs. For better or worse, NMI-and all other interrupt inputs-is not fail-safe. The non-maskable interrupt is seductive to some designers, especially when the pin is unused and there's a chance to save a few gates. Only RESET is guaranteed to bring the part back on-line. A WDT time-out means that something awful happened, something that may have left the CPU in an unpredictable scrambled state. The first rule of watchdog design is to drive the CPU's reset input, not an interrupt (such as NMI). A code crash means the timer counts down without interruption at time-out, hardware resets the CPU, ideally bringing the system back on-line. The code tickles the timer frequently, restarting the countdown interval. It's up to the firmware to reinitialize the watchdog timer, restarting the timing interval. The WDT usually resets the processor once every few hundred milliseconds unless reset. It's a mechanism that restarts the program if the software runs amok. A watchdog timer (WDT) is a good defense for all but the smallest of embedded systems. Problems can and do occur, though, due more often to hardware or software design flaws than to glitches. Our embedded systems, and even our desktop computers, switch trillions of bits without the slightest problem. Yet these failures and glitches are exceedingly rare.
A single-bit failure, for a fleetingly transient bit of time, is disaster. Smaller device geometries mean that sometimes only a handful of electrons represent a one or zero.
#Z220 how to update watchdog timer Pc
While people complain and fume about various PC crashes and other frustrations, we forget that the machine executes millions of instructions per second, even when sitting in an idle loop. 1% of leaving it on all the time.I'm constantly astonished by the utter reliability of computers. In this example the average current from leaving the processor on every 1024 watchdog intervals is still less than. That allows you to measure the watchdog period against the much more accurate main oscillator, then decide how many watchdog periods to count per desired wakeup time. A trick I have used a few times is to measure the watchdog interval by leaving the processor running every once in a while, like every 1024 wakeups, for example. One problem with using the watchdog for timing wakeups is that it is so inaccurate on these old PICs. Then you would count 69 of those to get about a 10 second wakeup period. Or, you could set the prescaler to 8, for example, to get nominal 144 ms periods. 10 seconds would be 556 watchdog trips at 18 ms each, for example. Waking up every 18 ms to decrement a counter and see if it has reached zero, then going back to sleep takes very little average current. Even 18 ms is a "long" time for the micro. However, the basic watchdog period can be extended to any length by counting in firmware. This means the maximum native watchdog period is nominally 2.3 seconds, with a possible range of 900 ms to 4.2 seconds. With the maximum prescaler setting, the watchdog trip period is multiplied by 128. There is a prescaler that can either be assigned to timer 0 or the watchdog. The watchdog timer always has a fixed period which is nominally 18 ms, but can vary from 7 to 33 ms.
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